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| TFDU6102F vishay semiconductors rev. a1.2, 24sep02 1 www.vishay.com document number 82551 fast infrared transceiver module (fir, 4 mbit/s) for 2.7 v to 5.25 v operation description the TFDU6102F transceiver is a lowpower infrared transceiver module compliant to the latest irda standard for fast infrared data communication, supporting irda speeds up to 4.0 mbit/s (fir), hp-sir ? , sharp ask ? and carrier based remote control modes up to 2 mhz. integrated within the transceiver modules are a photo pin diode, an infrared emitter (ired), and a lowpower cmos control ic to provide a total frontend solution in a single package. vishay telefunken's fir transceivers are available in different package options, including this babyface package (TFDU6102F), the standard setting, once smallest fir transceiver available on the market. this wide selection provides flexibility for a variety of applications and space constraints. the transceivers are capable of directly interfacing with a wide variety of i/o devices which perform the modulation/ demodulation function, including national semiconductor's pc87338, pc87108 and pc87109, smc's fdc37c669, fdc37n769 and cam35c44, and hitachi's sh3. at a minimum, a v cc bypass capacitor are the only external components required implementing a complete solution. features compliant to the irda standard (up to 4 mbit/s), hpsir ? , sharp ask ? and tv remote control for 3.0 v and 5.0 v applications operates from 2.7 v to 5.25 v within specification, low power consumption (< 3 ma supply current) power shutdown mode (< 5 a shutdown current in full temperature range) surface mount package universal (9.7 4.7 4.0 mm 3 ) tristatereceiver output, floating when in shutdown mode supporting static and different dynamic mode switching modes (ibm/ infineon and temic/ telefunken/vishay) high efficiency emitter babyface (universal) package capable of surface mount soldering to side and top view orientation directly interfaces with various super i/o and controller devices builtin emi protection no external shielding necessary only one external component required split power supply (us patent # 08995536), transmitter and receiver can be operated from two power supplies with relaxed requirements saving costs. fully compatible to tfdu6102e fully compatible to tfdu6101e in all applications without the only rarely used device identification (rxd low in sd mode) applications notebook computers, desktop pcs, palmtop computers (win ce, palm pc), pdas digital still and video cameras printers, fax machines, photocopiers, screen projectors telecommunication products (cellular phones, pagers) internet tv boxes, video conferencing systems external infrared adapters (dongles) medical and industrial data collection
TFDU6102F vishay semiconductors rev. a1.2, 24sep02 2 www.vishay.com document number 82551 package options TFDU6102F baby face (universal) weight 0.20 g ordering information part number qty / reel or tubes description TFDU6102Ftr3 1000 pcs oriented in carrier tape for side view surface mounting TFDU6102Ftt3 1000 pcs oriented in carrier tape for top view surface mounting functional block diagram logic & control amplifier pushpull driver controlled driver mode txd gnd rxd comparator sd v cc 2 v cc 1 figure 1. functional block diagram cautions: the bicmos inherent to the design of this component increases the components susceptibility to damage from electrostatic discharge (esd). it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. definitions : in the vishay transceiver data sheets the following nomenclature is used for defining the irda operating modes: sir: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version irphy 1.0 mir 576 kbit/s to 1152 kbit/s fir 4 mbit/s vfir 16 mbit/s mir and fir were implemented with irphy 1.1, followed by irphy 1.2, adding the sir low power standard. irphy 1.3 extended the low power option to mir and fir and vfir was added with irphy 1.4. a new version of the standard in any obsoletes the former version. TFDU6102F vishay semiconductors rev. a1.2, 24sep02 3 www.vishay.com document number 82551 pin description pin number function description i/o active auo 1 v cc2 , ired anode ired anode, to be externally connected to v cc 2. for higher voltages as 3.6 v an external resistor might be necessary for reducing the internal power dissipation. see derating curves. this pin is allowed to be supplied from an uncontrolled power supply separated from the controlled v cc1 supply 2 ired cathode ired cathode, internally connected to driver transistor 3 txd this input is used to transmit serial data when sd is low. an onchip protection circuit disables the led driver if the txd pin is asserted for longer than 100 ms. when used in conjunction with the sd pin, this pin is also used to control receiver mode. i high 4 rxd receiver data output o low 5 sd shutdown, also used for dynamic mode switching. assertion of this pin high for a period of time exceeding 400 m s places the module into shutdown mode. on the falling edge of this signal, the state of the txd pin is sampled and used to set receiver low bandwidth (txd = low) or high bandwidth (txd = high) mode. if the mode pin is asserted high, the dynamic mode switching circuit cannot force lowband- width, but if the mode pin is held low, mode switching is fully operational. i high 6 v cc1 supply voltage. connect to positive power supply (2.7 v to 5.25 v). placement of a 1.0 m f to 10.0 m f coupling ceramic capacitor as close as possible to the v pin is recommended. 7 mode high: high speed mode; mir and sir low: low speed mode, sir only (see chapter amode switchingo) i 8 gnd ground ired detector 14885 auo option baby face (universal) figure 2. pinnings TFDU6102F vishay semiconductors rev. a1.2, 24sep02 4 www.vishay.com document number 82551 absolute maximum ratings reference point pin: gnd unless otherwise noted. typical values are for design aid only, not guaranteed nor subject to production testing. parameters test conditions symbol min. typ. max. unit supply voltage range, transceiver 0 v TFDU6102F vishay semiconductors rev. a1.2, 24sep02 6 www.vishay.com document number 82551 optoelectronic characteristics t amb = 25 c, v cc = 2.7 v to 5.25 v unless otherwise noted. typical values are for design aid only, not guaranteed nor subject to production testing. parameters test conditions symbol min. typ. max. unit receiver minimum detection threshold irradiance, sir mode 9.6 kbit/s to 115.2 kbit/s = 850 nm to 900 nm e e 25 (2.5) 40 (4.0) mw/m 2 ( m w/cm 2 ) minimum detection threshold irradiance, mir mode 1.152 mbit/s = 850 nm to 900 nm e e 65 (6.5) mw/m 2 ( m w/cm 2 ) minimum detection threshold irradiance, fir mode 4.0 mbit/s = 850 nm to 900 nm e e 85 (8.5) 100 (10) mw/m 2 ( m w/cm 2 ) maximum detection threshold irradiance = 850 nm to 900 nm e e 5 (500) kw/m 2 (mw/cm 2 ) logic low receiver input irradiance e e 4 (0.4) mw/m 2 ( m w/cm 2 ) rise time of output signal 10% to 90%, c l = 15 pf t r (rxd) 60 ns fall time of output signal 90% to 10%, c l = 15 pf t f (rxd) 50 ns rxd pulse width of output signal, 50% sir mode 4.8 khz, 3/32 duty cycle t pw 1.0 24 m s rxd pulse width of output signal, 50% sir mode 115.2 kbit/s input pulse length p wopt = 1.6 m s t pw 1.0 2.1 m s rxd pulse width of output signal, 50% mir mode input pulse length p wopt = 217 ns, 1.152 mbit/s t pw 100 600 ns rxd pulse width of output signal, 50% input pulse length p wopt = 125 ns, 4 mbit/s t pw 80 165 ns g, fir mode input pulse length p wopt = 250 ns, 4.0 mbit/s t pw 210 290 ns stochastic jitter, leading edge input irradiance = 100 mw/m 2 , 4.0 mbit/s 1.152 mbit/s 576 kbit/s 115.2 kbit/s 10 20 80 350 ns ns ns ns receiver start up time after completion of shutdown programming sequence power on delay 500 m s latency t l 170 300 m s note: all timing data measured with 4 mbit/s are measured using the irda ? fir transmission header. the data given here are valid 5 m s after starting the preamble. TFDU6102F vishay semiconductors rev. a1.2, 24sep02 7 www.vishay.com document number 82551 optoelectronic characteristics (continued) t amb = 25 c, v cc = 2.7 v to 5.25 v unless otherwise noted. typical values are for design aid only, not guaranteed nor subject to production testing. parameters test conditions symbol min. typ. max. unit transmitter ired operating current, switched current limiter see derating curve. for 3.3 v operation no external resistor needed. for 5 v application that might be necessary i d 710 ma output leakage ired current i ired 1 1 m a output radiant intensity (see figure 3) recommended appl. circuit a = 0 , 15 txd = high, sd = low i e 120 170 500 mw/sr output radiant intensity v cc 1 = 5.0 v, a = 0 , 15 txd = low or sd = high, (receiver is inactive as long as sd = high) i e 0.04 mw/sr output radiant intensity, angle of half intensity 24 peak emission wavelength p 880 900 nm spectral bandwidth d l 40 nm optical rise time, fall time t ropt , t fopt 10 40 ns optical output pulse duration input pulse width 217 ns, 1.152 mbit/s t opt 207 217 227 ns input pulse width 125 ns, 4 mbit/s t opt 117 125 133 ns input pulse width 250 ns, 4 mbit/s t opt 242 250 258 ns ired protection time out t opt t 100 m s optical overshoot 25 % table 1. recommended serial resistor (r1, s. figure 3) values for different v ired parameter values unit v ired power supply 2.7 3.0 3.3 > 3.5 v resistor 0 1.8 4.7 6.8 TFDU6102F vishay semiconductors rev. a1.2, 24sep02 8 www.vishay.com document number 82551 recommended circuit diagram operated at a clean low impedance power supply the TFDU6102F needs no additional external components. however, depending on the entire system design and board layout, additional components may be required (see figure 3). ired anode rxd ground txd mode tfdu6102 c2 r1 v cc2 rxd gnd v cc1 mode txd v cc sd ired cathode r2 c1 sd figure 3. recommended application circuit the capacitor c1 is buffering the supply voltages and eliminates the inductance of the power supply line. this one should be a tantalum or other fast capacitor to guarantee the fast rise time of the ired current. the resistor r1 is necessary for higher operating voltages than 2.7 v, see the table for the value. vishay telefunken transceivers integrate a sensitive receiver and a built-in power driver. the combination of both needs a careful circuit board layout. the use of thin, long, resistive and inductive wiring should be avoided. the inputs (txd, sd/ mode) and the output rxd should be directly (dc) coupled to the i/o circuit. the capicitor c2 combined with the resistor r2 is the low pass filter for smoothing the supply voltage. r2, c1 and c2 are optional and dependent on the quality of the supply voltage v ccx and injected noise. an unstable power supply with dropping voltage during transmission may reduce sensitivity (and transmission range) of the transceiver. the placement of these parts is critical. it is strongly recommended to position c2 as near as possible to the transceiver power supply pins. an tantalum capacitor should be used for c1 while a ceramic capacitor is used for c2. in addition, when connecting the described circuit to the power supply, low impedance wiring should be used. when extended wiring is used the inductance of the power supply can cause dynamically a voltage drop at v cc2. often some power supplies are not apply to follow the fast current is rise time. in that case another 4.7 f (type, see table under c1) at v cc2 will be helpful. keep in mind that basic rfdesign rules for circuit design should be taken into account. especially longer signal lines should not be used without termination. see e.g. athe art of electronicso paul horowitz, wienfield hill, 1989, cambridge university press, isbn: 0521370957. table 2. recommended application circuit components component recommended value vishay part number c1 4.7 f, 16 v 293d 475x9 016b c2 0.1 m f, ceramic vj 1206 y 104 j xxmt r1 see table: recommended serial resistor values r2 47 w , 0.125 w crcw120647r0frt1 TFDU6102F vishay semiconductors rev. a1.2, 24sep02 9 www.vishay.com document number 82551 i/o and software in the description, already different i/os are mentioned. differnt combinations are tested and the function verified with the special drivers available from the i/o suppliers. in special cases refer to the i/o manual, the vishay application notes, or contact directly vishay sales, marketing or application. control: differences to tfdx6000 series for applications using i/os from nsc, winbond and ti no software upgrade is necessary. in combination with the latest smsc controllers for microsoft windows 98 ? a software upgrade is necessary, drivers are available from smsc and vishay semiconductor gmbh. this software is intended to work with windows 95 ? , too. alternatively the hp/ sharp settings can be selected. the microsoft operating systems nt 5.0 ? and windows 2000 ? provide miniport device drivers. mode switching the TFDU6102F is in the sir mode after power on as a default mode, therefore the fir data transfer rate has to be set by a programming sequence using the txd and sd inputs as described below or selected by setting the mode pin. the mode pin can be used to statically set the mode (mode pin: low: sir, high: 0.576 mbit/s to 4.0 mbit/s). if not used or in standby mode, the mode input should float or should not be loaded with more than 50 pf. the low frequency mode covers speeds up to 115.2 kbit/s. signals with higher data rates should be detected in the high frequency mode. lower frequency data can also be received in the high frequency mode but with reduced sensitivity. to switch the transceivers from low frequency mode to the high frequency mode and vice versa, the program- ming sequences described below are required. setting to the high bandwidth mode (0.576 mbit/s to 4.0 mbit/s) 1. set sd input to logic ahigho. 2. set txd input to logic ahigho. wait t s 200 ns. 3. set sd to logic alowo (this negative edge latches state of txd, which determines speed setting). 4. after waiting t h 200 ns txd can be set to logic alowo. the hold time of txd is limited by the maximum allowed pulse length. txd is now enabled as normal txd input for the high bandwidth mode. setting to the lower bandwidth mode (2.4 kbit/s to 115.2 kbit/s) 1. set sd input to logic ahigho. 2. set txd input to logic alowo. wait t s 200 ns. 3. set sd to logic alowo (this negative edge latches state of txd, which determines speed setting). 4. txd must be held for t h 200 ns. txd is now enabled as normal txd input for the lower bandwidth mode. TFDU6102F vishay semiconductors rev. a1.2, 24sep02 10 www.vishay.com document number 82551 txd sd/mode t s t h 50% high : fir low : sir 50% 50% 14873 figure 4. mode switching timing diagram table 3. truth table inputs outputs sd txd optical input irradiance mw/ m 2 rxd transmitter high x x floating 0 low high x high i e low high > 80 m s x high 0 low low < 4 high 0 low low > min. detection threshold irradiance < max. detection threshold irradiance low (active) 0 low low > max. detection threshold irradiance x 0 recommended smd pad layout the leads of the device should be soldered in the center position of the pads. for more configurations see inside the device drawing. 16524 0.6 ( 0.7) 1 2.5 ( 2.0) 8 1 7 x 1 = 7 figure 5. TFDU6102F babyface series (universal) note: leads of the device should be at least 0.3 mm within the ends of the pads. recommended solder profile time ( s ) temperature ( c ) 14874 0 30 60 90 120 150 180 210 240 0 50 100 150 200 250 300 350 2 - 4 c/s 10 s max. @ 230 c 90 s max. 120 - 180 s 2 - 4 c/s figure 6. recommended solder profile TFDU6102F vishay semiconductors rev. a1.2, 24sep02 11 www.vishay.com document number 82551 tfdu6101/ TFDU6102F baby face (universal) package (mechanical dimensions) 12249 TFDU6102F vishay semiconductors rev. a1.2, 24sep02 12 www.vishay.com document number 82551 revision history: a1.0, 01/02/2002 :new edition for optimized fir device with integrated current limiter. tristate rxd a1.1, 17/07/2002 :redundant information removed as description of tfdu6101 TFDU6102F vishay semiconductors rev. a1.2, 24sep02 13 www.vishay.com document number 82551 ozone depleting substances policy statement it is the policy of vishay semiconductor gmbh to 1. meet all present and future national and international statutory requirements. 2. regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. it is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (odss). the montreal protocol (1987) and its london amendments (1990) intend to severely restrict the use of odss and forbid their use within the next ten years. various national and international initiatives are pressing for an earlier ban on these substances. vishay semiconductor gmbh has been able to use its policy of continuous improvements to eliminate the use of odss listed in the following documents. 1. annex a, b and list of transitional substances of the montreal protocol and the london amendments respectively 2. class i and ii ozone depleting substances in the clean air act amendments of 1990 by the environmental protection agency (epa) in the usa 3. council decision 88/540/eec and 91/690/eec annex a, b and c (transitional substances) respectively. vishay semiconductor gmbh can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. we reserve the right to make changes to improve technical design and may do so without further notice. parameters can vary in different applications. all operating parameters must be validated for each customer application by the customer. should the buyer use vishay semiconductors products for any unintended or unauthorized application, the buyer shall indemnify vishay semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. vishay semiconductor gmbh, p.o.b. 3535, d-74025 heilbronn, germany telephone: 49 (0)7131 67 2831, fax number: 49 (0)7131 67 2423 |
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